XC3S100E Datasheet, PDF (140/193 Pages) Xilinx, Inc – DC and Switching Characteristics

R
Pinout Descriptions
Footprint Migration Differences
Table 15 summarizes any footprint and functionality differ-
ences between the XC3S100E and the XC3S250E FPGAs
that may affect easy migration between devices. There are
four such pins. All other pins not listed in Table 15 uncondi-
tionally migrate between Spartan-3E devices available in
the TQ144 package.
The arrows indicate the direction for easy migration. For
example, a left-facing arrow indicates that the pin on the
XC3S250E unconditionally migrates to the pin on the
XC3S100E. It may be possible to migrate the opposite
direction depending on the I/O configuration. For example,
an I/O pin (Type = I/O) can migrate to an input-only pin
(Type = INPUT) if the I/O pin is configured as an input.
Table 15: TQ144 Footprint Migration Differences
TQ144 Pin
Bank
XC3S100E Type
Migration
XC3S250E Type
P10
3
I/O
INPUT
P29
3
I/O
INPUT
P31
3
VREF(INPUT)
VREF(I/O)
P66
2
VREF(INPUT)
VREF(I/O)
DIFFERENCES
4
Legend:
This pin can unconditionally migrate from the device on the left to the device on the right. Migration in the other direction may be
possible depending on how the pin is configured for the device on the right.
This pin can unconditionally migrate from the device on the right to the device on the left. Migration in the other direction may be
possible depending on how the pin is configured for the device on the left.
The pinout changed slightly between the XC3S100E engi-
neering samples and the production devices, as shown in
Table 16. In the engineering samples, the mode select pins
M1 and M0 overlap with two global clock inputs feeding the
bottom edge global buffers and DCMs. In the production
devices, the mode pins are swapped with parallel mode
data pins, D1 and D2. This way, these two mode pins do not
interfere with global clock inputs.
Table 16: XC3S100E Pinout Changes between
Production Devices and Engineering Samples
TQ144 Pin
XC3S100E
Production
Devices
XC3S100E
Engineering
Samples
P58
D2/GCLK2
M1/GCLK2
P59
D1/GCLK3
M0/GCLK3
P60
M1
D2
P62
M0
D1
DS312-4 (v1.1) March 21, 2005
www.xilinx.com
19
Advance Product Specification