XC3S100E Datasheet, PDF (112/193 Pages) Xilinx, Inc – DC and Switching Characteristics

R
DC and Switching Characteristics
Internal
Logic
V_OUTP
P
N
V_OUTN
Differential
I/O Pair Pins
V_OUTN
V_OUTP
GND level
50%
V_OCM
V_OD
V_OH
V_OL
V_OCM = Output common mode voltage =
V_OUTP + V_OUTN
2
V_OD = Output differential voltage = ^V_OUTP ^{- V}_OUTN
V_OH = Output voltage indicating a High logic level
V_OL ^{= Output voltage indicating a Low logic level} DS312-3_03_021505
Figure 2: Differential Output Voltages
Table 10: DC Characteristics of User I/Os Using Differential Signal Standards
V_OD
∆V_OD
V_OCM
∆V_OCM
V_OH
V_OL
IOSTANDARD Min
Typ Max Min Max
Min
Min Max Min Max
Attribute
(mV) (mV) (mV) (mV) (mV)
(V) Typ (V) Max (V) (mV) (mV)
(V)
(V)
LVDS_25
250
350
450
-
-
1.125
-
1.375
-
-
1.25 1.25
BLVDS_25
250
350
450
-
-
-
1.20
-
-
-
-
-
MINI_LVDS_25
300
-
600
-
50
1.0
-
1.4
-
50
1.15 1.25
RSDS_25
100
-
400
-
-
1.1
-
1.4
-
-
1.15 1.35
Notes:
1. The numbers in this table are based on the conditions set forth in Table 4 and Table 9.
2. Output voltage measurements for all differential standards are made with a termination resistor (R_T) of 100Ω across the N and P pins of the
differential signal pair.
3. At any given time, no more than two differential standards may be assigned to each bank.
DS312-3 (v1.0) March 1, 2005
www.xilinx.com
9
Advance Product Specification