XC3S100E Datasheet, PDF (155/193 Pages) Xilinx, Inc – DC and Switching Characteristics

Pinout Descriptions
R
Table 19: FT256 Package Pinout (Continued)
Bank
3
3
3
XC3S250E Pin Name
IP
IP
IO
XC3S500E Pin Name
IP
IP
IO
XC3S1200E Pin Name
IP
IP
IP
3
IP
3
IP
3
IP
3
IP
3
IP
3
IP/VREF_3
3
IO/VREF_3
IP
IP
IP
IP
IP
IP/VREF_3
IO/VREF_3
IP
IP
IP
IP
IP
IP/VREF_3
IP/VREF_3
3
3
3
3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
FT256
Ball
D2
F2
F5
H1
J6
K4
M3
N3
G1
N2
E2
G6
K6
M2
A1
A16
B9
F6
F11
G7
G8
G9
G10
H2
H7
H8
H9
H10
J7
J8
J9
Type
INPUT
INPUT
250E: I/O
500E: I/O
1200E: INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VREF
250E: VREF(I/O)
500E: VREF(I/O)
1200E:
VREF(INPUT)
VCCO
VCCO
VCCO
VCCO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
34
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DS312-4 (v1.1) March 21, 2005
Advance Product Specification