XC3S100E Datasheet, PDF (104/193 Pages) Xilinx, Inc – DC and Switching Characteristics

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DS312-3 (v1.0) March 1, 2005
018
Spartan-3E FPGA Family:
DC and Switching
Characteristics
0 0 _{Advance Product Specification}
DC Electrical Characteristics
In this section, specifications may be designated as
Advance, Preliminary, or Production. These terms are
defined as follows:
Advance: Initial estimates are based on simulation, early
characterization, and/or extrapolation from the characteris-
tics of other families. Values are subject to change. Use as
estimates, not for production.
Preliminary: Based on characterization. Further changes
are not expected.
Production: These specifications are approved once the
silicon has been characterized over numerous production
lots. Parameter values are considered stable with no future
changes expected.
All parameter limits are representative of worst-case supply
voltage and junction temperature conditions. The following
applies unless otherwise noted: The parameter values
published in this module apply to all Spartan™-3E
devices. AC and DC characteristics are specified using
the same numbers for both commercial and industrial
grades.
If a particular Spartan-3E FPGA differs in functional
behavior or electrical characteristic from this data
sheet, those differences are described in a separate
errata document. The errata documents for Spartan-3E
FPGAs are living documents and are available online.
Table 1: Absolute Maximum Ratings
Symbol
Description
Conditions
Min
Max
Units
V_CCINT
V_CCAUX
V_CCO
V_REF
V_IN(2)
Internal supply voltage
Auxiliary supply voltage
Output driver supply voltage
Input reference voltage
Voltage applied to all User I/O pins and
Dual-Purpose pins
Driver in a high-impedance state
–0.5
1.32
V
–0.5
3.00
V
–0.5
3.75
V
–0.5
V_CCO + 0.5⁽³⁾
V
–0.5
V_CCO + 0.5⁽³⁾
V
V_ESD
Voltage applied to all Dedicated pins
Electrostatic Discharge Voltage
Human body model
Charged device model
–0.5
V_CCAUX+ 0.5⁽⁴⁾
V
–2000
+2000
V
–500
+500
V
Machine model
–200
+200
V
T_J
T_STG
Junction temperature
Storage temperature
-
125
°C
–65
150
°C
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only;
functional operation of the device at these or any other conditions beyond those listed under the Recommended Operating Conditions is not
implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time adversely affects device reliability.
2. As a rule, the V_IN limits apply to both the DC and AC components of signals. Simple application solutions are available that show how to
handle overshoot/undershoot as well as achieve PCI compliance. Refer to the following application notes: "Virtex™-II Pro and Spartan-3
3.3V PCI Reference Design" (XAPP653) and "Using 3.3V I/O Guidelines in a Virtex-II Pro Design" (XAPP659).
3. Each of the User I/O and Dual-Purpose pins is associated with one of the four banks’ V_CCO rails. Meeting the V_IN max limit ensures that the
internal diode junctions that exist between these pins and their associated V_CCO rails do not turn on. Table 4 specifies the V_CCO range used
to determine the max limit. When V_CCO is at its maximum recommended operating level (3.45V), V_IN max is 3.95V. The maximum voltage
that avoids oxide stress is V_INX = 4.05V. As long as the V_IN max specification is met, oxide stress is not possible.
4. All Dedicated pins (PROG_B, DONE, TCK, TDI, TDO, and TMS) draw power from the V_CCAUX rail (2.5V). Meeting the V_IN max limit ensures
that the internal diode junctions that exist between each of these pins and the V_CCAUX rail do not turn on. Table 4 specifies the V_CCAUX range
used to determine the max limit. When V_CCAUX is at its maximum recommended operating level (2.625V), V_IN max < 3.125V. As long as the
V_IN max specification is met, oxide stress is not possible.
5. For soldering guidelines, see "Device Packaging and Thermal Characteristics" at www.xilinx.com/bvdocs/userguides/ug112.pdf. Also see
"Implementation and Solder Reflow Guidelines for Pb-Free Packages" at www.xilinx.com/bvdocs/appnotes/xapp427.pdf.
© 2005 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc.
All other trademarks are the property of their respective owners.
DS312-3 (v1.0) March 1, 2005
www.xilinx.com
1
Advance Product Specification