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XC3S100E Datasheet, PDF (17/193 Pages) Xilinx, Inc – DC and Switching Characteristics
Functional Description
R
pull-down resistors are commonly applied to unused I/Os,
inputs, and three-state outputs, but can be used on any I/O.
The pull-up resistor connects an I/O to VCCO through a
resistor. The resistance value depends on the VCCO voltage
(see Module 3 for the specifications). The pull-down resistor
similarly connects an I/O to ground with a resistor. The PUL-
LUP and PULLDOWN attributes and library primitives turn
on these optional resistors.
By default, PULLDOWN resistors terminate all unused I/Os.
Unused I/Os can alternatively be set to PULLUP or FLOAT.
To change the unused I/O Pad setting, set the Bitstream
Generator (BitGen) option UnusedPin to PULLUP, PULL-
DOWN, or FLOAT. The UnusedPin option is accessed
through the Properties for Generate Programming File in
ISE.
During configuration a Low logic level on HSWAP activates
the pull-up resistors for all I/Os not used directly in the
selected configuration mode.
Keeper Circuit
Each I/O has an optional keeper circuit (see Figure 9) that
keeps bus lines from floating when not being actively driven.
The KEEPER circuit retains the last logic level on a line after
all drivers have been turned off. Apply the KEEPER
attribute or use the KEEPER library primitive to use the
KEEPER circuitry. Pull-up and pull-down resistors override
the KEEPER settings.
Weak Pull-up
Output Path
Input Path
Keeper
Weak Pull-down
DS312-2_25_022805
Figure 9: Keeper Circuit
Slew Rate Control and Drive Strength
Each IOB has a slew-rate control that sets the output
switching edge-rate for LVCMOS and LVTTL outputs. The
SLEW attribute controls the slew rate and can either be set
to SLOW (default) or FAST.
Each LVCMOS and LVTTL output additionally supports up
to six different drive current strengths as shown in Table 5.
To adjust the drive strength for each output set the DRIVE
attribute to the desired drive strength: 2, 4, 6, 8, 12, and 16.
Table 5: Programmable Output Drive Current
Signal
Standard
Output Drive Current (mA)
2
4
6
8 12 16
LVTTL
LVCMOS33
LVCMOS25
-
LVCMOS18
-
-
LVCMOS15
-
-
-
LVCMOS12
-
-
-
-
-
High output current drive strength and FAST output slew
rates generally result in fastest I/O performance. However,
these same settings generally also result in transmission
line effects on the printed circuit board (PCB) for all but the
shortest board traces. Each IOB has independent slew rate
and drive strength controls. Use the slowest slew rate and
lowest output drive current that meets the performance
requirements for the end application.
Likewise, due to lead inductance, a given package supports
a limited number of simultaneous switching outputs (SSOs)
when using fast, high-drive outputs. Only use fast,
high-drive outputs when required by the application.
IOBs Organized into Banks
The Spartan-3E architecture organizes IOBs into four I/O
banks as shown in Figure 10. Each bank maintains sepa-
rate VCCO and VREF supplies. The separate supplies allow
each bank to independently set VCCO. Similarly, the VREF
supplies may be set for each bank. Refer to Table 3 and
Table 4 for VCCO and VREF requirements.
When working with Spartan-3E devices, most of the differ-
ential I/O standards are compatible and can be combined
within any given bank. Each bank can support any two of
the following differential standards: LVDS_25 outputs,
MINI_LVDS_25 outputs, and RSDS_25 outputs. As an
example, LVDS_25 outputs, RSDS_25 outputs, and any
other differential inputs while using on-chip differential ter-
mination are a valid combination. A combination not allowed
is a single bank with LVDS_25 outputs, RSDS_25 outputs,
and MINI_LVDS_25 outputs.
10
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DS312-2 (v1.1) March 21, 2005
Advance Product Specification