XC3S100E Datasheet, PDF (142/193 Pages) Xilinx, Inc – DC and Switching Characteristics

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Pinout Descriptions
PQ208: 208-pin Plastic Quad Flat
Package
The 208-pin plastic quad flat package, PQ208, supports two
different Spartan-3E FPGAs, including the XC3S250E and
the XC3S500E.
Table 17 lists all the PQ208 package pins. They are sorted
by bank number and then by pin name. Pairs of pins that
form a differential I/O pair appear together in the table. The
table also shows the pin number for each pin and the pin
type, as defined earlier.
An electronic version of this package pinout table and foot-
print diagram is available for download from the Xilinx web-
site at http://www.xilinx.com/bvdocs/publications/s3e_pin.zip.
Pinout Table
Table 17: PQ208 Package Pinout
Bank
XC3S250E
XC3S500E
Pin Name
PQ208
Pin
0
IO
P187
0
IO/VREF_0
P179
0
IO_L01N_0
P161
0
IO_L01P_0
P160
0
IO_L02N_0/VREF_0
P163
0
IO_L02P_0
P162
0
IO_L03N_0
P165
0
IO_L03P_0
P164
0
IO_L04N_0/VREF_0
P168
0
IO_L04P_0
P167
0
IO_L05N_0
P172
0
IO_L05P_0
P171
0
IO_L07N_0/GCLK5
P178
0
IO_L07P_0/GCLK4
P177
0
IO_L08N_0/GCLK7
P181
0
IO_L08P_0/GCLK6
P180
0
IO_L10N_0/GCLK11
P186
0
IO_L10P_0/GCLK10
P185
0
IO_L11N_0
P190
0
IO_L11P_0
P189
0
IO_L12N_0/VREF_0
P193
0
IO_L12P_0
P192
0
IO_L13N_0
P197
Type
I/O
VREF
I/O
I/O
VREF
I/O
I/O
I/O
VREF
I/O
I/O
I/O
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
I/O
I/O
VREF
I/O
I/O
Table 17: PQ208 Package Pinout
Bank
XC3S250E
XC3S500E
Pin Name
PQ208
Pin
Type
0
IO_L13P_0
P196
I/O
0
IO_L14N_0/VREF_0
P200
VREF
0
IO_L14P_0
P199
I/O
0
IO_L15N_0
P203
I/O
0
IO_L15P_0
P202
I/O
0
IO_L16N_0/HSWAP
P206
DUAL
0
IO_L16P_0
P205
I/O
0
IP
P159
INPUT
0
IP
P169
INPUT
0
IP
P194
INPUT
0
IP
P204
INPUT
0
IP_L06N_0
P175
INPUT
0
IP_L06P_0
P174
INPUT
0
IP_L09N_0/GCLK9
P184
GCLK
0
IP_L09P_0/GCLK8
P183
GCLK
0
VCCO_0
P176
VCCO
0
VCCO_0
P191
VCCO
0
VCCO_0
P201
VCCO
1
IO_L01N_1/A15
P107
DUAL
1
IO_L01P_1/A16
P106
DUAL
1
IO_L02N_1/A13
P109
DUAL
1
IO_L02P_1/A14
P108
DUAL
1
IO_L03N_1/VREF_1
P113
VREF
1
IO_L03P_1
P112
I/O
1
IO_L04N_1
P116
I/O
1
IO_L04P_1
P115
I/O
1
IO_L05N_1/A11
P120
DUAL
1
IO_L05P_1/A12
P119
DUAL
1
IO_L06N_1/VREF_1
P123
VREF
1
IO_L06P_1
P122
I/O
1
IO_L07N_1/A9/RHCLK1 P127 RHCLK/DUAL
1
IO_L07P_1/A10/RHCLK0 P126 RHCLK/DUAL
1
IO_L08N_1/A7/RHCLK3 P129 RHCLK/DUAL
1
IO_L08P_1/A8/RHCLK2 P128 RHCLK/DUAL
DS312-4 (v1.1) March 21, 2005
www.xilinx.com
21
Advance Product Specification