XC3S100E Datasheet, PDF (64/193 Pages) Xilinx, Inc – DC and Switching Characteristics

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Functional Description
A specific Spartan-3E part type always requires a constant
number of configuration bits, regardless of design complex-
ity, as shown in Table 39. The configuration file size for a
multiple-FPGA daisy-chain design equals the sum of the
individual file sizes.
Table 39: Number of Bits to Program a Spartan-3E
FPGA (Uncompressed Bitstreams)
Device
Number of Configuration
Bits
XC3S100E
581,344
XC3S250E
1,352,192
XC3S500E
2,267,136
XC3S1200E
3,832,320
XC3S1600E
5,957,760
Pin Behavior During Configuration
Table 40 shows how various pins behave during the FPGA
configuration process. The actual behavior depends on the
values applied to the M2, M1, and M0 mode select pins and
the HSWAP pin. The mode select pins determine which of
the I/O pins are borrowed during configuration and how they
function. In JTAG configuration mode, no user-I/O pins are
borrowed for configuration.
All I/O pins are high impedance (floating, three-stated, Hi-Z)
during the configuration process. These pins are indicated
in Table 40 as shaded table entries or cells. If the HSWAP
input is Low, these pins have a pull-up resistor to their asso-
ciated V_CCO supply that is active throughout configuration.
After configuration, pull-up and pull-down resistors are
available in the FPGA application as described in Pull-Up
and Pull-Down Resistors, page 9.
Spartan-3E FPGAs have only six dedicated configuration
pins, including the DONE and PROG_B pins, and the four
JTAG boundary-scan pins: TDI, TDO, TMS, and TCK.
Table 40: Pin Behavior during Configuration
Pin Name
Master
Serial
SPI (Serial BPI (Parallel
Flash)
NOR Flash)
TDI
TDI
TDI
TDI
TMS
TMS
TMS
TMS
TCK
TCK
TCK
TCK
TDO
TDO
TDO
TDO
PROG_B
PROG_B PROG_B
PROG_B
DONE
DONE
DONE
DONE
HSWAP
HSWAP
HSWAP
HSWAP
M2
0
0
0
M1
0
0
1
M0
0
1
0 = Up
1 = Down
CCLK
CCLK (O) CCLK (O) CCLK (O)
INIT_B
INIT_B
INIT_B
INIT_B
CSO_B
CSO_B
CSO_B
DOUT/BUSY
DOUT
DOUT
BUSY
MOSI/CSI_B
MOSI
CSI_B
D7
D7
D6
D6
D5
D5
D4
D4
JTAG
TDI
TMS
TCK
TDO
PROG_B
DONE
HSWAP
1
0
1
Slave
Parallel
TDI
TMS
TCK
TDO
PROG_B
DONE
HSWAP
1
1
0
Slave Serial
TDI
TMS
TCK
TDO
PROG_B
DONE
HSWAP
1
1
1
Supply/
I/O Bank
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
0
2
2
2
CCLK (I)
CCLK (I)
2
INIT_B
INIT_B
2
CSO_B
2
BUSY
DOUT
2
CSI_B
2
D7
2
D6
2
D5
2
D4
2
DS312-2 (v1.1) March 21, 2005
www.xilinx.com
57
Advance Product Specification