XC3S100E Datasheet, PDF (110/193 Pages) Xilinx, Inc – DC and Switching Characteristics

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DC and Switching Characteristics
Table 8: DC Characteristics of User I/Os Using Single-Ended Standards (Continued)
Test Conditions
Logic Level Characteristics
IOSTANDARD Attribute
I_OL
(mA)
I_OH
(mA)
V_OL
Max (V)
V_OH
Min (V)
SSTL2_I
8.1
–8.1
V_TT - 0.61
V_TT + 0.61
Notes:
1. The numbers in this table are based on the conditions set forth in Table 4 and Table 7.
2. Descriptions of the symbols used in this table are as follows:
I_OL -- the output current condition under which V_OL is tested
I_OH -- the output current condition under which V_OH is tested
V_OL -- the output voltage that indicates a Low logic level
V_OH -- the output voltage that indicates a High logic level
V_IL -- the input voltage that indicates a Low logic level
V_IH -- the input voltage that indicates a High logic level
V_CCO -- the supply voltage for output drivers
V_REF -- the reference voltage for setting the input switching threshold
V_TT -- the voltage applied to a resistor termination
3. For the LVCMOS and LVTTL standards: the same V_OL and V_OH limits apply for both the Fast and Slow slew attributes.
4. All Dedicated output pins (DONE and TDO) as well as Dual-Purpose totem-pole output pins (CCLK, D0-D7, BUSY/DOUT, CSO_B, MOSI,
HDC, LDC0-LDC2, and A0-A23) exhibit the characteristics of LVCMOS25 with Slow slew rate; all have 8 mA drive except CCLK, which has
12 mA drive.
5. Tested according to the relevant PCI specifications. For more information, see "Virtex-II Pro and Spartan-3 3.3V PCI Reference Design"
(XAPP653).
DS312-3 (v1.0) March 1, 2005
www.xilinx.com
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