XC3S100E Datasheet, PDF(173/193 Page) Xilinx, Inc – DC and Switching Characteristics

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XC3S100E Datasheet, PDF (173/193 Pages) Xilinx, Inc – DC and Switching Characteristics

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Pinout Descriptions

FG320 Footprint

Bank 0

A GND

TDI

INPUT I/O INPUT I/O INPUT

L24P_0 L22P_0 L20N_0

I/O

VCCO_0

I/O

L12N_0

GCLK7

INPUT

I/O

I/O INPUT I/O

TCK GND

L05P_0 L04N_0 L02N_0 L01N_0

B PROG_B GND

I/O

L25N_0

HSWAP

I/O

L24N_0

INPUT

L22N_0

I/O

L20P_0

VCCAUX

INPUT

L13P_0

GCLK8

INPUT

L13N_0

GCLK9

I/O

L12P_0

GCLK6

I/O

VREF_0

VCCAUX

I/O

L05N_0

VREF_0

I/O

L04P_0

INPUT

L02P_0

I/O

L01P_0

GND

INPUT

I/O

L01P_3

I/O

L01N_3

I/O

L25P_0

I/O

I/O VCCO_0 I/O

L23P_0

L18P_0

INPUT

L16P_0

I/O

L14P_0

GCLK10

GND

I/O

L09P_0

INPUT

L07P_0

I/O

VCCO_0 L03N_0

VREF_0

INPUT

TDO

I/O

L24N_1

LDC2

I/O

L24P_1

LDC1

I/O

L02P_3

I/O

L02N_3

VREF_3

INPUT

I/O

L23N_0

VREF_0

I/O

L21P_0

I/O

L18N_0

VREF_0

INPUT

L16N_0

I/O

L14N_0

GCLK11

I/O

L11P_0

GCLK4

I/O

L09N_0

INPUT

L07N_0

INPUT

I/O

L03P_0

TMS

I/O

L23N_1

LDC0

I/O

L23P_1

HDC

INPUT

VREF_1

I/O

L03N_3

I/O

L03P_3

I/O

L04N_3

I/O

L04P_3 VCCINT L21N_0

I/O

L19N_0

VREF_0

I/O

L17P_0

I/O

L15P_0

I/O

L11N_0

GCLK5

I/O

L08P_0

I/O

L06N_0

I/O

I/O INPUT

I/O VCCINT L22P_1 L22N_1

INPUT

I/O

L05P_3

I/O

INPUT

VCCO_3

L05N_3

INPUT VCCINT I/O

L19P_0

I/O

L17N_0

I/O

L15N_0

INPUT

L10P_0

I/O

L08N_0

I/O VCCINT I/O

L06P_0

L21N_1

I/O VCCO_1 I/O

L21P_1

L19N_1

I/O

L19P_1

INPUT

VCCAUX

I/O

L06P_3

I/O

L06N_3

VREF_3

I/O

L07N_3

I/O

L07P_3

GND VCCO_0

I/O

INPUT VCCO_0 GND

L10N_0

I/O

I/O VCCAUX INPUT

L20N_1 L20P_1 L18P_1 L18N_1

I/O

L10N_3

I/O

L10P_3

I/O

L09N_3

I/O

L09P_3

I/O

L08N_3

I/O VCCO_3

L08P_3

GND

I/O

L12P_3

LHCLK2

L12N_3

LHCLK3

IRDY2

K VCCO_3 INPUT

GND

I/O

L13P_3

LHCLK4

TRDY2

I/O

L11N_3

LHCLK1

I/O

L13N_3

LHCLK5

I/O

L11P_3

LHCLK0

I/O

L14N_3

LHCLK7

INPUT

VREF_3

I/O

L14P_3

LHCLK6

INPUT

I/O

L15P_3

I/O

L15N_3

I/O

L16P_3

I/O

L16N_3

I/O

L17N_3

VREF_3

I/O

L17P_3

VCCO_3

GND

VCCO_1

I/O

L15P_1

I/O

L11N_1

RHCLK1

VCCO_1

INPUT

I/O

L15N_1

I/O

L11P_1

A10

RHCLK0

INPUT

I/O

L17P_1

I/O

L14N_1

RHCLK7

I/O

L12N_1

RHCLK3

TRDY1

INPUT

I/O

L17N_1

I/O

L14P_1

RHCLK6

I/O

L12P_1

RHCLK2

I/O

L09N_1

A11

I/O

L16P_1

I/O

L13N_1

RHCLK5

GND

I/O

L09P_1

A12

I/O

L16N_1

I/O

L13P_1

RHCLK4

IRDY1

INPUT

I/O

L10N_1

VREF_1

INPUT

VREF_1

VCCO_1

INPUT

I/O

L10P_1

INPUT

VCCAUX

I/O

L18N_3

I/O

L18P_3

I/O

L19P_3

I/O

L19N_3

GND

VCCO_2

I/O

L12N_2

GCLK13

I/O

L16P_2

VCCO_2

GND

I/O

L05N_1

VREF_1

I/O

L05P_1

I/O

L07P_1

I/O VCCAUX I/O

L07N_1

L08N_1

N INPUT

INPUT VCCO_3 I/O

L20P_3

I/O VCCINT I/O

L20N_3

L07P_2

I/O

L09N_2

I/O

L12P_2

GCLK12

I/O

L16N_2

DIN

I/O

L18N_2

I/O

L21P_2 VCCINT L04N_1

I/O

L04P_1 VCCO_1 INPUT

I/O

L08P_1

I/O

L21N_3

I/O

L21P_3

I/O

L22P_3

I/O

L22N_3 VCCINT

I/O

L05N_2

I/O

L07N_2

I/O

L09P_2

I/O

L15N_2

GCLK3

I/O

L18P_2

I/O

L21N_2

I/O

INPUT

L22P_2 VCCINT

A23

I/O

L06P_1 L06N_1

INPUT

R INPUT

I/O

L23N_3

I/O

L23P_3

VREF_3

I/O

L04P_2

I/O

L05P_2

INPUT

L08N_2

I/O

L10P_2

I/O

L15P_2

GCLK2

I/O

L20N_2

I/O

L22N_2

A22

I/O

L24N_2

A20

I/O

L03P_1

I/O

L03N_1

VREF_1

INPUT

I/O

L02P_1

A14

I/O

L24N_3

I/O

L24P_3

I/O

L01N_2

INIT_B

I/O

L03N_2

MOSI

CSI_B

I/O VCCO_2 INPUT

L04N_2

L08P_2

I/O

L10N_2

GND

INPUT

L14N_2

GCLK1

INPUT

L17P_2

I/O

L20P_2

VCCO_2

I/O

L24P_2

A21

I/O

VREF_2

I/O

L26P_2

VS0

A17

I/O

L01N_1

A15

I/O

L02N_1

A13

U INPUT

GND

I/O

L01P_2

CSO_B

I/O

L03P_2

DOUT

BUSY

I/O

VREF_2

INPUT

VCCAUX

INPUT

L11P_2

I/O

L13P_2

GCLK14

INPUT

L14P_2

RDWR_B

GCLK0

INPUT

L17N_2

VCCAUX

INPUT

L23N_2

I/O

L25N_2

VS1

A18

I/O

L26N_2

CCLK

GND

I/O

L01P_1

A16

I/O

GND

INPUT

L02N_2

INPUT

L02P_2

L06P_2

L06N_2

VREF_2

I/O

INPUT

L11N_2

VREF_2

I/O

L13N_2

GCLK15

VCCO_2

I/O

L19P_2

I/O

L19N_2

VREF_2

INPUT

L23P_2

I/O

L25P_2

VS2

A19

INPUT

DONE

GND

Bank 2

Figure 8: FG320 Package Footprint (top view)

DS312-4_06_021605

I/O: Unrestricted,

general-purpose user I/O

INPUT: Unrestricted,

general-purpose input pin

CONFIG: Dedicated

configuration pins

0 N.C.: Not connected

DUAL: Configuration pin, then

possible user-I/O

VREF: User I/O or input

voltage reference for bank

GCLK: User I/O, input, or

global buffer input

VCCO: Output voltage supply

for bank

JTAG: Dedicated JTAG port

pins

VCCINT: Internal core supply

voltage (+1.2V)

28 GND: Ground

VCCAUX: Auxiliary supply

voltage (+2.5V)

www.xilinx.com

DS312-4 (v1.1) March 21, 2005

Advance Product Specification

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