SH7137 Datasheet, PDF (957/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 22 Flash Memory
(3.6) After erasure finishes, clear FKEY and specify software protection.
If this LSI is restarted by a power-on reset immediately after user MAT erasing has finished,
secure a reset period (period of RES = 0) that is at least as long as the normal 100 µs.
(4) Erasing and Programming Procedure in User Program Mode
By changing the on-chip RAM address of the download destination in FTDAR, the erasing
program and programming program can be downloaded to separate on-chip RAM areas.
Figure 22.13 shows an example of repetitively executing RAM emulation, erasing, and
programming.
1
Start procedure program
Set FTDAR to H'00
(Specify H'FFFF9000 as
download destination)
Download erasing program
Initialize erasing program
Enter RAM emulation mode and
tune data in on-chip RAM
Cancel RAM emulation mode
Erase relevant block
(execute erasing program)
Set FTDAR to H'04
(Specify H'FFFFB000 as
download destination)
Set FMPDR to H'FFFFA000 to
program relevant block
(execute programming program)
Download programming
program
Initialize programming
program
1
Confirm operation
End?
No
Yes
End procedure program
Figure 22.13 Sample Procedure of Repeating RAM Emulation, Erasing, and Programming
(Overview)
In the above example, the erasing program and programming program are downloaded to areas
excluding addresses (H'FFFFA000 to H'FFFFAFFF) to execute RAM emulation.
Download and initialization are performed only once at the beginning.
In this kind of operation, note the following:
• Be careful not to destroy on-chip RAM with overlapped settings.
Rev. 2.00 Sep. 10, 2008 Page 931 of 1130
REJ09B0402-0200