SH7137 Datasheet, PDF (810/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 19 Controller Area Network (RCAN-ET)
19.8.5 Interrupts
As shown in table 19.2, a Mailbox 0 receive interrupt can activate the DTC. If configured such
that the DTC is activated by a Mailbox 0 receive interrupt and clearing of the interrupt source flag
upon DTC transfer is enabled, use block transfer mode and read the whole Mailbox 0 message up
to the message control field 1 (CONTROL1).
Rev. 2.00 Sep. 10, 2008 Page 784 of 1130
REJ09B0402-0200