SH7137 Datasheet, PDF (454/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
MPφ
Input capture
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 10.102 Counter Clear Timing (Input Capture) (Channels 0 to 5)
Buffer Operation Timing: Figures 10.103 to 10.105 show the timing in buffer operation.
MPφ
TCNT
n
n+1
Compare
match buffer
signal
TGRA,
TGRB
n
N
TGRC,
N
TGRD
Figure 10.103 Buffer Operation Timing (Compare Match)
MPφ
Input capture
signal
TCNT
N
N+1
TGRA,
TGRB
n
N
N+1
TGRC,
TGRD
n
N
Figure 10.104 Buffer Operation Timing (Input Capture)
Rev. 2.00 Sep. 10, 2008 Page 428 of 1130
REJ09B0402-0200