SH7137 Datasheet, PDF (1020/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 24 Power-Down Modes
Bit
4
3
2 to 0
Bit Name
MSTP4
Initial
Value
1

1

All 0
R/W Description
R/W Module Stop Bit 4
When this bit is set to 1, the clock supply to the DTC is
halted.
0: DTC operates
1: Clock supply to the DTC halted
R Reserved
This bit is always read as 1. The write value should
always be 1.
R Reserved
These bits are always read as 0. The write value should
always be 0.
24.3.3 Standby Control Register 3 (STBCR3)
STBCR3 is an 8-bit readable/writable register that controls the operation of modules in power-
down mode.
Bit: 7
6
5
4
3
2
1
0
MSTP
15
-
MSTP MSTP MSTP MSTP
13
12
11
10
- MSTP8
Initial value: 1
1
1
1
1
1
1
1
R/W: R/W R R/W R/W R/W R/W R R/W
Initial
Bit
Bit Name Value R/W Description
7
MSTP15 1
R/W Module Stop Bit 15
When this bit is set to 1, the clock supply to the I²C2 is
halted.
0: I²C2 operates
1: Clock supply to I²C2 halted
6

1
R Reserved
This bit is always read as 1. The write value should
always be 1.
Rev. 2.00 Sep. 10, 2008 Page 994 of 1130
REJ09B0402-0200