SH7137 Datasheet, PDF (538/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 12 Port Output Enable (POE)
Initial
Bit
Bit Name
value R/W Description
2
MTU2PE2ZE 0
R/W* MTU2 PE2 High-Impedance Enable
This bit specifies whether to place the PE2/TIOC0C
pin for channel 0 in the MTU2 in the high-impedance
state when either POE8F or MTU2CH0HIZ bit is set
to 1.
0: Does not place the pin in the high-impedance state
1: Places the pin in the high-impedance state
1
MTU2PE1ZE 0
R/W* MTU2 PE1 High-Impedance Enable
This bit specifies whether to place the PE1/TIOC0B
pin for channel 0 in the MTU2 in the high-impedance
state when either POE8F or MTU2CH0HIZ bit is set
to 1.
0: Does not place the pin in the high-impedance state
1: Places the pin in the high-impedance state
0
MTU2PE0ZE 0
R/W* MTU2 PE0 High-Impedance Enable
This bit specifies whether to place the PE0/TIOC0A
pin for channel 0 in the MTU2 in the high-impedance
state when either POE8F or MTU2CH0HIZ bit is set
to 1.
0: Does not place the pin in the high-impedance state
1: Places the pin in the high-impedance state
Note: * Can be modified only once after a power-on reset.
Rev. 2.00 Sep. 10, 2008 Page 512 of 1130
REJ09B0402-0200