SH7137 Datasheet, PDF (1123/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 26 Electrical Characteristics
26.3.12 I²C Bus Interface 2 (I²C2) Timing
Table 26.17 I²C Bus Interface 2 (I²C2) Timing
Conditions: V_CC = 3.0 V to 3.6 V or 4.0 V to 5.5 V, AV_CC = 4.5 V to 5.5 V, AV_refh = 4.5 V to
AV_CC, V_SS = PLLV_SS = AV_SS = AV_refl = 0 V,
T_a = –20°C to +85°C (consumer applications),
T_a = –40°C to +85°C (industrial applications)
Item
Symbol Min.
Typ. Max.
SCL input cycle time
t_SCL
SCL input high pulse width t
SCLH
SCL input low pulse width t
SCLL
SCL and SDA input fall time t
Sf
SCL and SDA input spike t
SP
pulse removal time
12 t_pcyc + 600 
3 t + 300 
pcyc
5 t + 300 
pcyc







300
1t
pcyc
SDA input bus free time
t
5
BUF
Start condition input hold time t_STAH
3
Repeated start condition input t_STAS
3
setup time



Halt condition input setup t
3
STOS
time

Data input setup time
t
SDAS
1 t + 20  
pcyc
Data input hold time
t
0
SDAH

SCL and SDA capacity load C_b
0
 400
SCL and SDA output fall time t

Sf
 250
Note: t_pcyc indicates the peripheral clock (Pφ) cycle.
Reference
Unit Figure
ns
Figure 26.29
ns
ns
ns
ns
t
pcyc
t_pcyc
t_pcyc
t
pcyc
ns
ns
pF
ns
Rev. 2.00 Sep. 10, 2008 Page 1097 of 1130
REJ09B0402-0200