SH7137 Datasheet, PDF (519/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 12 Port Output Enable (POE)
Section 12 Port Output Enable (POE)
The port output enable (POE) module can be used to place the large current pins (pins multiplexed
with TIOC3B, TIOC3D, TIOC4A, TIOC4B, TIOC4C, and TIOC4D in the MTU2 and TIOC3BS,
TIOC3DS, TIOC4AS, TIOC4BS, TIOC4CS, and TIOC4DS in the MTU2S) and the pins for
channel 0 of the MTU2 (pins multiplexed with TIOC0A, TIOC0B, TIOC0C, and TIOC0D) in the
high-impedance state, upon transitions on the POE0 to POE2, POE4 to POE6, and POE8 input
pins, in accord with the output states of the large current pins, or by register settings. It can also
generate interrupt requests at the same time.
12.1 Features
• Each of the POE0 to POE2, POE4 to POE6, and POE8 input pins can be set for falling edge,
Pφ/8 × 16, Pφ/16 × 16, or Pφ/128 × 16 low-level sampling.
• The large current pins and the pins for channel 0 of the MTU2 can be placed in the high-
impedance state on the falling edge or low-level sampling of the POE0 to POE2, POE4 to
POE6, and POE8 pins.
• Output levels on the large current pins are compared and if active-level outputs continue on
multiple pins simultaneously for one cycle or more, the large current pins can be placed in the
high-impedance state.
• The large current pins and the pins for channel 0 of the MTU2 can be placed in the high-
impedance state by modifying the POE register setting.
• Interrupts can be generated by input-level sampling or output-level comparison results.
The POE has input level detection circuits, output level comparison circuits, and a high-impedance
request/interrupt request generating circuit as shown in figure 12.1.
In addition to control by the POE, the large current pins can be placed in the high-impedance state
when the oscillator stops or in software standby state. For details, refer to appendix A, Pin States.
TIMMTU1A_020020030800
Rev. 2.00 Sep. 10, 2008 Page 493 of 1130
REJ09B0402-0200