SH7137 Datasheet, PDF (580/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 14 Serial Communication Interface (SCI)
Table 14.3 SCSMR Settings
SCSMR Settings
n
Clock Source
CKS1
CKS0
0
Pφ
0
0
1
Pφ/4
0
1
2
Pφ/16
1
0
3
Pφ/64
1
1
Note: The bit rate error in asynchronous is given by the following formula:
Error (%) =
Pφ × 10⁶
- 1 × 100
(N + 1) × B × 64 × 2^2n-1
Tables 14.4 to 14.6 show examples of SCBRR settings in asynchronous mode, and tables 14.7 to
14.9 show examples of SCBRR settings in clock synchronous mode.
Rev. 2.00 Sep. 10, 2008 Page 554 of 1130
REJ09B0402-0200