SH7137 Datasheet, PDF (1151/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

M
Mailbox................................................... 726
Mailbox control ...................................... 726
Mailbox structure.................................... 730
Manual reset ............................................. 80
MCU extension mode ............................... 51
MCU operating modes.............................. 49
Message control field.............................. 731
Message data fields................................. 736
Message receive sequence ...................... 776
Message transmission sequence.............. 773
Micro processor interface (MPI)............. 726
Module standby mode........................... 1004
Module standby mode
setting ..............199, 597, 639, 683, 720, 988
MTU2 functions ..................................... 240
MTU2 interrupts ..................................... 420
MTU2 output pin initialization ............... 452
MTU2–MTU2S synchronous
operation ................................................. 409
MTU2S functions ................................... 486
Multi-function timer pulse unit 2
(MTU2)................................................... 239
Multi-function timer pulse unit 2S
(MTU2S) ................................................ 485
Multiply and accumulate registers
(MACH and MACL) ................................ 21
Multiprocessor communication
function................................................... 585
N
NMI interrupt.......................................... 106
Noise filter .............................................. 674
Nonlinearity error ................................... 709
Normal space interface ........................... 221
Normal transfer mode ............................. 181
Note on changing operating mode ............ 54
Note on crystal resonator .......................... 73
Notes on board design ...................... 73, 711
Notes on connecting V_CL capacitor ....... 1103
Notes on noise countermeasures ............. 712
Notes on register access (WDT) ............. 529
Notes on slot illegal instruction
exception handling .................................... 91
O
Offset error.............................................. 709
On-board programming mode................. 918
On-chip peripheral module interrupts ..... 107
Operating clock for each module .............. 58
P
Package dimensions .............................. 1114
PC trace................................................... 148
Peripheral clock (Pφ)................................. 55
Pin function controller (PFC).................. 785
Pin states of bus related signals............. 1112
Pin states of this LSI in each
processing state ..................................... 1105
Port output enable (POE) ........................ 493
Power-down modes................................. 989
Power-down state...................................... 47
Power-on reset .......................................... 79
Procedure register (PR)............................. 21
Product code lineup............................... 1113
Program counter (PC) ............................... 21
Program execution state ............................ 47
Programmer mode................................... 986
Q
Quantization error ................................... 709
R
RAM ....................................................... 987
Rev. 2.00 Sep. 10, 2008 Page 1125 of 1130
REJ09B0402-0200