SH7137 Datasheet, PDF (708/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 16 I²C Bus Interface 2 (I²C2)
Table 16.6 Time for Monitoring SCL
CKS3
CKS2
NF2CYC
Time for Monitoring SCL*¹
0
0
0
6.5
t *2
pcyc
1
5.5
t *2
pcyc
1
0
18.5
t *2
pcyc
1
17.5
t *2
pcyc
1
0
0
16.5
t *2
pcyc
1
15.5
t *2
pcyc
1
0
40.5
t *2
pcyc
1
39.5
t *2
pcyc
Notes: 1. SCL pin level is monitored after "time for monitoring SCL" has elapsed from the rising
edge of the reference clock for monitoring SCL.
2. t_pcyc indicates the period of the peripheral clock.
Rev. 2.00 Sep. 10, 2008 Page 682 of 1130
REJ09B0402-0200