SH7137 Datasheet, PDF (719/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 17 A/D Converter (ADC)
17.3.2 A/D Status Registers_0 and _1 (ADSR_0 and ADSR_1)
ADSRs are 8-bit readable/writable registers that indicate the status of the A/D converter.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
ADF
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R R/(W)*
Note: * Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Do not overwrite this bit with 0 when the value of this bit is 0.
Bit Bit Name
7 to 1 
Initial
Value
All 0
0
ADF
0
R/W
R
R/(W)*
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
A/D End Flag
A status flag that indicates the completion of A/D
conversion.
[Setting condition]
• When A/D conversion on all specified channels is
completed in scan mode
[Clearing conditions]
• When 0 is written after reading ADF = 1
• When the DTC is activated by an ADI interrupt and
ADDR is read
Rev. 2.00 Sep. 10, 2008 Page 693 of 1130
REJ09B0402-0200