SH7137 Datasheet, PDF (1045/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Register Name
Mailbox interrupt mask
register 0
Unread message status
register 0
MB[0]. CONTROL0H
CONTROL0L
LAFMH
LAFML
MSG_DATA[0]
MSG_DATA[1]
MSG_DATA[2]
MSG_DATA[3]
MSG_DATA[4]
MSG_DATA[5]
MSG_DATA[6]
MSG_DATA[7]
CONTROL1H
CONTROL1L
MB[1]. CONTROL0H
CONTROL0L
LAFMH
LAFML
MSG_DATA[0]
MSG_DATA[1]
MSG_DATA[2]
MSG_DATA[3]
MSG_DATA[4]
MSG_DATA[5]
MSG_DATA[6]
MSG_DATA[7]
CONTROL1H
CONTROL1L
Section 25 List of Registers
No. of
Abbreviation Bits Address
Module
MBIMR0
16
H'FFFFD852 RCAN-ET
UMSR0
16
H'FFFFD85A

16
H'FFFFD900

16
H'FFFFD902

16
H'FFFFD904

16
H'FFFFD906

8
H'FFFFD908

8
H'FFFFD909

8
H'FFFFD90A

8
H'FFFFD90B

8
H'FFFFD90C

8
H'FFFFD90D

8
H'FFFFD90E

8
H'FFFFD90F

8
H'FFFFD910

8
H'FFFFD911

16
H'FFFFD920

16
H'FFFFD922

16
H'FFFFD924

16
H'FFFFD926

8
H'FFFFD928

8
H'FFFFD929

8
H'FFFFD92A

8
H'FFFFD92B

8
H'FFFFD92C

8
H'FFFFD92D

8
H'FFFFD92E

8
H'FFFFD92F

8
H'FFFFD930

8
H'FFFFD931
Connected
Access Size No. of Access Cycles Bus Width
16
Pφ (reference clock) 16 bits
B: 2
16
W: 2
L: 4
16, 32
16
16, 32
16
8, 16, 32
8
8, 16
8
8, 16, 32
8
8, 16
8
8, 16
8
16, 32
16
16, 32
16
8, 16, 32
8
8, 16
8
8, 16, 32
8
8, 16
8
8, 16
8
Rev. 2.00 Sep. 10, 2008 Page 1019 of 1130
REJ09B0402-0200