SH7137 Datasheet, PDF (1026/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 24 Power-Down Modes
24.4 Sleep Mode
24.4.1 Transition to Sleep Mode
Executing the SLEEP instruction when the STBY bit in STBCR1 is 0 causes a transition from the
program execution state to sleep mode. However, sleep mode cannot be entered when the bus is
released (low-level input to BREQ pin). Although the CPU halts immediately after executing the
SLEEP instruction, the contents of its internal registers remain unchanged. The on-chip peripheral
modules continue to operate.
24.4.2 Canceling Sleep Mode
Sleep mode is canceled by a reset.
Do not cancel sleep mode with an interrupt.
Canceling with Reset: Sleep mode is canceled by a power-on reset with the RES pin, a manual
reset with the MRES pin, or an internal power-on/manual reset by WDT.
Rev. 2.00 Sep. 10, 2008 Page 1000 of 1130
REJ09B0402-0200