SH7137 Datasheet, PDF (917/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 22 Flash Memory
22.3 Input/Output Pins
Flash memory is controlled by the pins as shown in table 22.3.
Table 22.3 Pin Configuration
Name
Power-on reset
Flash programming
enable
Mode 1
Mode 0*
Transmit data
Pin Name
RES
FWE
Input/Output
Input
Input
MD1
MD0
TXD1 (PA4)
Input
Input
Output
Receive data
RXD1 (PA3) Input
Note: * The SH7136 does not have the MD0 pin.
Function
Reset
Hardware protection when
programming flash memory
Sets operating mode of this LSI
Sets operating mode of this LSI
Serial transmit data output (used in
boot mode)
Serial receive data input (used in boot
mode)
22.4 Register Descriptions
22.4.1 Registers
The registers/parameters which control flash memory when the on-chip flash memory is valid are
shown in table 22.4.
There are several operating modes for accessing flash memory, for example, read mode/program
mode.
There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters
are allocated for each operating mode and MAT selection. The correspondence of operating modes
and registers/parameters for use is shown in table 22.5.
Rev. 2.00 Sep. 10, 2008 Page 891 of 1130
REJ09B0402-0200