SH7137 Datasheet, PDF (127/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Interrupt Controller (INTC)
Initial
Bit
Bit Name Value
R/W Description
3
IRQ3F
0
R/W Indicates the status of an IRQ3 interrupt request.
• When level detection mode is selected
0: An IRQ3 interrupt has not been detected
[Clearing condition]
Driving pin IRQ3 high
1: An IRQ3 interrupt has been detected
[Setting condition]
Driving pin IRQ3 low
• When edge detection mode is selected
0: An IRQ3 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ3F = 1
 Accepting an IRQ3 interrupt
1: An IRQ3 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ3
2
IRQ2F
0
R/W Indicates the status of an IRQ2 interrupt request.
• When level detection mode is selected
0: An IRQ2 interrupt has not been detected
[Clearing condition]
Driving pin IRQ2 high
1: An IRQ2 interrupt has been detected
[Setting condition]
Driving pin IRQ2 low
• When edge detection mode is selected
0: An IRQ2 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ2F = 1
 Accepting an IRQ2 interrupt
1: An IRQ2 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ2
Rev. 2.00 Sep. 10, 2008 Page 101 of 1130
REJ09B0402-0200