SH7137 Datasheet, PDF (1021/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 24 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
5
MSTP13 1
R/W Module Stop Bit 13
When this bit is set to 1, the clock supply to the SCI_2
is halted.
0: SCI_2 operates
1: Clock supply to SCI_2 halted
4
MSTP12 1
R/W Module Stop Bit 12
When this bit is set to 1, the clock supply to the SCI_1
is halted.
0: SCI_1 operates
1: Clock supply to SCI_1 halted
3
MSTP11 1
R/W Module Stop Bit 11
When this bit is set to 1, the clock supply to the SCI_0
is halted.
0: SCI_0 operates
1: Clock supply to SCI_0 halted
2
MSTP10 1
R/W Module Stop Bit 10
When this bit is set to 1, the clock supply to the SSU is
halted.
0: SSU operates
1: Clock supply to SSU halted
1

1
R Reserved
This bit is always read as 1. The write value should
always be 1.
0
MSTP8
1
R/W Module Stop Bit 8
When this bit is set to 1, the clock supply to the RCAN-
ET_0 is halted.
0: RCAN-ET_0 operates
1: Clock supply to RCAN-ET_0 halted
Rev. 2.00 Sep. 10, 2008 Page 995 of 1130
REJ09B0402-0200