SH7137 Datasheet, PDF (892/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 21 I/O Ports
21.3.2 Port D Data Register L (PDDRL)
The port D data register L (PDDRL) is a 16-bit readable/writable register that stores port D data.
Bits PD10DR to PD0DR correspond to pins PD10 to PD0 (multiplexed functions omitted here).
When a pin function is general output, if a value is written to PDDRL, that value is output directly
from the pin, and if PDDRL is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PDDRL is read, the pin state, not the register value, is
returned directly. If a value is written to PDDRL, although that value is written into PDDRL, it
does not affect the pin state. Table 21.6 summarizes port D data register read/write operations.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
PB7 PB7 PB5 PB4 PB3 PB2 PB1 PB0
DR DR DR DR DR DR DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 11 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
10
PD10DR 0
R/W See table 21.6.
9
PD9DR 0
R/W
8
PD8DR 0
R/W
7
PD7DR 0
R/W
6
PD6DR 0
R/W
5
PD5DR 0
R/W
4
PD4DR 0
R/W
3
PD3DR 0
R/W
2
PD2DR 0
R/W
1
PD1DR 0
R/W
0
PD0DR 0
R/W
Rev. 2.00 Sep. 10, 2008 Page 866 of 1130
REJ09B0402-0200