SH7137 Datasheet, PDF (900/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 21 I/O Ports
Table 21.8 Port E Data Register (PEDR) Read/Write Operations
• PEDRH Bits 5 to 0 and PEDRL Bits 15 to 0
PEIOR Pin Function Read
Write
0
General input Pin state
Can write to PEDRH and PEDRL, but it has no
effect on pin state
Other than
general input
Pin state
Can write to PEDRH and PEDRL, but it has no
effect on pin state
1
General output PEDRH or
Value written is output from pin
PEDRL value
Other than
PEDRH or
Can write to PEDRH and PEDRL, but it has no
general output PEDRL value effect on pin state
21.4.3 Port E Port Registers H and L (PEPRH and PEPRL)
The port E port registers H and L (PEPRH and PEPRL) are 16-bit read-only registers that always
return the states of the pins regardless of the PFC setting. Bits PE21PR to PE0PR correspond to
pins PE21 to PE0, respectively (multiplexed functions omitted here).
• PEPRH
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
PE21 PE20 PE19 PE18 PE17 PE16
PR PR PR PR PR PR
Initial value: 0
0
0
0
0
0
0
0
0
0
*
*
*
*
*
*
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Initial
Bit
Bit Name Value R/W
15 to 6 
All 0
R
5
PE21PR Pin state R
4
PE20PR Pin state R
3
PE19PR Pin state R
2
PE18PR Pin state R
1
PE17PR Pin state R
0
PE16PR Pin state R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
The pin state is returned regardless of the PFC setting.
These bits cannot be modified.
Rev. 2.00 Sep. 10, 2008 Page 874 of 1130
REJ09B0402-0200