SH7137 Datasheet, PDF (128/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Interrupt Controller (INTC)
Initial
Bit
Bit Name Value
R/W Description
1
IRQ1F 0
R/W Indicates the status of an IRQ1 interrupt request.
• When level detection mode is selected
0: An IRQ1 interrupt has not been detected
[Clearing condition]
Driving pin IRQ1 high
1: An IRQ1 interrupt has been detected
[Setting condition]
Driving pin IRQ1 low
• When edge detection mode is selected
0: An IRQ1 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ1F = 1
 Accepting an IRQ1 interrupt
1: An IRQ1 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ1
0
IRQ0F 0
R/W Indicates the status of an IRQ0 interrupt request.
• When level detection mode is selected
0: An IRQ0 interrupt has not been detected
[Clearing condition]
Driving pin IRQ0 high
1: An IRQ0 interrupt has been detected
[Setting condition]
Driving pin IRQ0 low
• When edge detection mode is selected
0: An IRQ0 interrupt has not been detected
[Clearing conditions]
 Writing 0 after reading IRQ0F = 1
 Accepting an IRQ0 interrupt
1: An IRQ0 interrupt request has been detected
[Setting condition]
Detecting the specified edge of pin IRQ0
Note: * The initial value is 1 when the level on the corresponding IRQ pin is high, and 0 when
the level on the pin is low.
Rev. 2.00 Sep. 10, 2008 Page 102 of 1130
REJ09B0402-0200