SH7137 Datasheet, PDF (236/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 9 Bus State Controller (BSC)
Initial
Bit
Bit Name Value R/W Description
31 to 13 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
12

1
R
Reserved
This bit is always read as 1. The write value should
always be 1.
11 to 5 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
4

1
R
Reserved
This bit is always read as 1. The write value should
always be 1.
3, 2

All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
1
HIZMEM 0
R/W High-Z Memory Control
Specifies the pin state in software standby mode for
A19 to A0, CSn, WRL, and RD. While the bus is
released, these pins are in high-impedance state
regardless of this bit setting.
0: High impedance in software standby mode
1: Driven in software standby mode
0

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 2.00 Sep. 10, 2008 Page 210 of 1130
REJ09B0402-0200