SH7137 Datasheet, PDF (886/1160 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 21 I/O Ports
21.2.1 Register Descriptions
Port B is a 6-bit input/output port in the SH7136, an 8-bit input/output port in the SH7137. Port B
has the following registers. For details on register addresses and register states during each
processing, refer to section 25, List of Registers.
Table 21.3 Register Configuration
Register Name
Port B data register L
Port B port register L
Abbrevia-
tion
R/W Initial Value Address
Access Size
PBDRL
R/W H'0000
H'FFFFD182 8, 16
PBPRL
R
H'00xx
H'FFFFD19E 8, 16
21.2.2 Port B Data Register L (PBDRL)
The port B data register L (PBDRL) is a 16-bit readable/writable register that stores port B data.
Bits PB7DR to PB2DR correspond to pins PB7 to PB2, respectively (multiplexed functions
omitted here) in the SH7136. Bits PB7DR to PB0DR correspond to pins PB7 to PB0, respectively
(multiplexed functions omitted here) in the SH7137.
When a pin function is general output, if a value is written to PBDRL, that value is output directly
from the pin, and if PBDRL is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PBDRL is read, the pin state, not the register value, is
returned directly. If a value is written to PBDRL, although that value is written into PBDRL, it
does not affect the pin state. Table 21.4 summarizes port B data register read/write operations.
Rev. 2.00 Sep. 10, 2008 Page 860 of 1130
REJ09B0402-0200