JG82852GMSL7VP Datasheet, PDF (99/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Register Description
R
3.10.8.
HDR – Header Type
Address Offset:
Default Value:
Access:
Size:
0Eh
080h
Read Only
8 bits
This register identifies the header layout of the configuration space. No physical register exists at this
location.
Bit
Descriptions
7:0
PCI Header (HDR): This field always returns 80 to indicate that Device 0 is a multifunction device. If
Functions other than #0 are disabled this field returns a 00 to indicate that the Intel 852GM/852GMV GMCH
is a single function device with standard header layout. The default is 80 Reads and writes to this location
have no effect.
3.10.9.
SVID – Subsystem Vendor Identification
Address Offset:
Default Value:
Access:
Size:
2Ch
0000h
Write Once
16 bits
This value is used to identify the vendor of the subsystem.
Bit
Descriptions
15:0
Subsystem Vendor ID (SUBVID): This field should be programmed during boot-up to indicate the vendor of
the system board. After it has been written once, it becomes read only.
3.10.10.
ID – Subsystem Identification
Address Offset:
Default Value:
Access:
Size:
2Eh
0000h
Write Once
16 bits
This value is used to identify a particular subsystem.
Bit
Descriptions
15:0
Subsystem ID (SUBID): This field should be programmed during BIOS initialization. After it has been written
once, it becomes read only.
Intel^® 852GM/852GMV Chipset GMCH Datasheet
99