JG82852GMSL7VP Datasheet, PDF (108/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Register Description
R
3.11.13.
SVID2 – Subsystem Vendor Identification Register - Device #2
Address Offset:
Default Value:
Access:
Size:
2C 2Dh
0000h
Read/Write Once
16 bits
Bit
Description
15:0 Subsystem Vendor ID: This value is used to identify the vendor of the subsystem. This register should be
programmed by BIOS during boot-up. Once written, this register becomes Read_Only. This register can
only be cleared by a Reset.
3.11.14.
SID2 – Subsystem Identification Register - Device #2
Address Offset:
Default Value:
Access:
Size:
2E 2Fh
0000h
Read/Write Once
16 bits
Bit
Description
15:0 Subsystem Identification: This value is used to identify a particular subsystem. This field should be
programmed by BIOS during boot-up. Once written, this register becomes Read_Only. This register can
only be cleared by a Reset.
3.11.15.
ROMADR – Video BIOS ROM Base Address Registers - Device
#2
Address Offset:
Default Value:
Access:
Size:
30 33h
00000000h
Read Only
32 bits
The IGD does not use a separate BIOS ROM, therefore this register is hardwired to 0’s.
Bit
31:18
17:11
10:1
0
Description
ROM Base Address RO
Address Mask RO: Indicates 256 kB address range.
Reserved
ROM BIOS Enable RO: Indicates ROM not accessible.
108
Intel^® 852GM/852GMV Chipset GMCH Datasheet