JG82852GMSL7VP Datasheet, PDF (49/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Register Description
R
3.6.
I/O Mapped Registers
The GMCH contains two registers that reside in the CPU I/O address space: the Configuration Address
(CONFIG_ADDRESS) Register and the Configuration Data (CONFIG_DATA) Register. The
Configuration Address Register enables/disables the configuration space and determines what portion of
configuration space is visible through the Configuration Data window.
3.6.1. CONFIG_ADDRESS – Configuration Address Register
I/O Address:
Default Value:
Access:
Size:
0CF8h Accessed as a Dword
00000000h
Read/Write
32 bits
CONFIG_ADDRESS is a 32-bit register that can be accessed only as a Dword. A Byte or Word
reference will “pass through” the Configuration Address Register and the Hub Interface, onto the PCI
bus as an I/O cycle. The CONFIG_ADDRESS register contains the Bus Number, Device Number,
Function Number, and Register Number for which a subsequent configuration access is intended.
Figure 1. Configuration Address Register
31 30 24 23 16 15 11 10
87
2 1 0 ^Bit
0R
0
0
0
0
R ^Default
Reserved
Register Number
Function Number
Device Number
Bus Number
Reserved
Enable
Intel^® 852GM/852GMV Chipset GMCH Datasheet
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