JG82852GMSL7VP Datasheet, PDF (38/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Signal Description
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2.5.2. Digital Video Port C (DVOC)
Table 8. Digital Video Port C (DVOC) Signal Descriptions
Name
Type Description
DVOCD[11:0]
DVOCHSYNC
DVOCVSYNC
DVOCBLANK#
DVOBCINTR#
DVOCFLDSTL
ADDID[7:0]
DVODETECT
O
DVO
O
DVO
O
DVO
O
DVO
I
DVO
I
DVO
I
DVO
I
DVO
DVOC Data: This data bus is used to drive 12-bit RGB data on each edge of the
differential clock signals, DVOCCLK and DVOCCLK#. This provides 24-bits of data
per clock period. In dual channel mode, this provides the upper 12-bits of pixel data.
DVOCD[11:0] should be left as left as NC (“Not Connected”) if not used.
Horizontal Sync: HSYNC signal for the DVOC interface.
DVOCHSYNC should be left as left as NC (“Not Connected”) if not used.
Vertical Sync: VSYNC signal for the DVOC interface.
DVOCVSYNC should be left as left as NC (“Not Connected”) if the signal is NOT
used when using internal graphics device.
Flicker Blank or Border Period Indication: DVOCBLANK# is a programmable
output pin driven by the Intel 852GM/852GMV GMCH.
When programmed as a blank period indication, this pin indicates active pixels
excluding the border. When programmed as a border period indication, this pin
indicates active pixel including the border pixels.
DVOCBLANK# should be left as left as NC (“Not Connected”) if not used.
DVOBC Interrupt: This pin is used to signal an interrupt, typically used to indicate a
hot plug or unplug of a digital display.
TV Field and Flat Panel Stall Signal. This input can be programmed to be either
a TV Field input from the TV encoder or Stall input from the flat panel.
DVOC TV Field Signal: When used as a Field input, it synchronizes the overlay
field with the TV encoder field when the overlay is displaying an interleaved source.
DVOC Flat Panel Stall Signal: When used as the Stall input, it indicates that the
pixel pipeline should stall one horizontal line. The signal changes during horizontal
blanking. The panel fitting logic, when expanding the image vertically, uses this.
DVOCFLDSTL needs to be pulled down if not used.
ADDID[7:0]: These pins are used to communicate to the Video BIOS when an
external device is interfaced to the DVO port.
Note: Bit[7] needs to be strapped low when a DVO device is present. The other
pins should be left as NC.
DVODETECT: This strapping signal indicates to the GMCH whether a DVO device
is plugged in or not. When a DVO device is connected, then DVODETECT = 0.
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Intel^® 852GM/852GMV Chipset GMCH Datasheet