English
Language : 

JG82852GMSL7VP Datasheet, PDF (24/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)
Introduction
R
cycles are positively decoded to the DDR SDRAM. Memory accesses initiated from the Hub Interface to
DDR SDRAM will be snooped on the system bus.
1.4.2.
1.5.
1.6.
Intel 852GMV GMCH Processor Host Interface
Intel Celeron processor (400 MHz) and Intel Celeron D processor on 90 nm process and in the 478-pin
package (533 MHz) key features include:
Source synchronous double pumped address
Source synchronous quad pumped data
System bus interrupt and side-band signal delivery
AGTL+ termination resistors on all of the AGTL+ signals
32-bit host bus addressing allowing the CPU to access the entire 4-GB of the memory address
space
Intel 852GMV GMCH has an In-Order Queue to support up to twelve outstanding pipelined address
requests on the host bus. Intel 852GMV GMCH supports one outstanding defer cycle at a time; however,
it supports only one to any particular I/O interface. Host initiated I/O cycles are positively decoded to the
Intel 852GMV GMCH configuration space and subtractively decoded to the Hub Interface. Host
initiated memory cycles are positively decoded to the DDR SDRAM. Memory accesses initiated from
the Hub Interface to DDR SDRAM will be snooped on the system bus.
Intel 852GM/852GMV GMCH Host Bus Error Checking
The Intel 852GM/852GMV GMCH does not generate nor check parity for Data, Address/Request, and
Response signals on the processor bus.
Intel 852GM/852GMV GMCH System Memory Interface
The Intel 852GM/852GMV GMCH System Memory controller directly supports the following:
One channel of PC1600/2100 SO-DIMM DDR SDRAM memory
DDR SDRAM devices with densities of 128-Mb, 256-Mb, and 512-Mb technology
Maximum system memory support of two, double-sided SO-DIMMs (four rows populated) with
up to 1 GB memory
Variable page sizes of 2-kB, 4-kB, 8-kB, and 16-kB. Page size is individually selected for every
row and a maximum of 16 pages may be opened simultaneously
Table 1. DDR Memory Capacity
Technology
128 Mb
256 Mb
512 Mb
128 Mb
Width
8
8
8
16
System Memory Capacity
256 MB
512 MB
1 GB
256 MB
24
Intel® 852GM/852GMV Chipset GMCH Datasheet