JG82852GMSL7VP Datasheet, PDF (4/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

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3.9.
3.10.
3.8.3. PCICMD – PCI Command Register................................................................. 55
3.8.4. PCI Status Register.......................................................................................... 56
3.8.5. RID – Register Identification ............................................................................ 57
3.8.6. SUBC – Sub Class Code ................................................................................. 57
3.8.7. BCC – Base Class Code.................................................................................. 58
3.8.8. HDR – Header Type......................................................................................... 58
3.8.9. SVID – Subsystem Vendor Identification ......................................................... 58
3.8.10. SID – Subsystem Identification ........................................................................ 59
3.8.11. CAPPTR – Capabilities Pointer ....................................................................... 59
3.8.12. CAPID Capability Identification Register (Device 0) ..................................... 60
3.8.13. RRBAR – Register Range Base Address Register (Device 0) ........................ 61
3.8.14. GMC – GMCH Miscellaneous Control Register (Device 0) ............................. 62
3.8.15. GGC – GMCH Graphics Control Register (Device 0)...................................... 63
3.8.16. DAFC – Device and Function Control Register (Device 0).............................. 64
3.8.17. FDHC – Fixed DRAM Hole Control Register (Device 0).................................. 64
3.8.18. PAM(6:0) – Programmable Attribute Map Register (Device 0)........................ 65
3.8.19. SMRAM – System Management RAM Ctrl Register (Device 0) ...................... 69
3.8.20. ESMRAMC – Extended System Management RAM Control (Device 0) ......... 70
3.8.21. ERRSTS – Error Status Register (Device 0) ................................................... 71
3.8.22. ERRCMD – Error Command Register (Device 0)............................................ 72
3.8.23. SMICMD – SMI Error Command Register (Device 0) ..................................... 74
3.8.24. SCICMD – SCI Error Command Register (Device 0) ...................................... 75
3.8.25. CAPD – Capability Disable Bits ....................................................................... 75
Intel 852GM/852GMV GMCH Main Memory Control, Memory I/O Control Registers
(Device #0, Function #1) ............................................................................................... 76
3.9.1. VID – Vendor Identification .............................................................................. 77
3.9.2. DID – Device Identification............................................................................... 77
3.9.3. PCICMD – PCI Command Register................................................................. 78
3.9.4. PCISTS – PCI Status Register ........................................................................ 79
3.9.5. RID – Revision Identification............................................................................ 80
3.9.6. SUBC – Sub-Class Code ................................................................................. 80
3.9.7. BCC – Base Class Code.................................................................................. 80
3.9.8. HDR – Header Type......................................................................................... 81
3.9.9. SVID – Subsystem Vendor Identification ......................................................... 81
3.9.10. SID – Subsystem Identification ........................................................................ 81
3.9.11. CAPPTR – Capabilities Pointer ....................................................................... 82
3.9.12. DRB – DRAM Row Boundary Register - Device #0 ........................................ 82
3.9.13. DRA – DRAM Row Attribute Register - Device #0 .......................................... 83
3.9.14. DRT – DRAM Timing Register - Device #0...................................................... 84
3.9.15. PWRMG – DRAM Controller Power Management Control Register - Device #087
3.9.16. DRC – DRAM Controller Mode Register - Device #0 ...................................... 88
3.9.17. DTC – DRAM Throttling Control Register (Device 0) ...................................... 90
Intel 852GM/852GMV GMCH Configuration Process and Registers (Device #0,
Function #3) .................................................................................................................. 94
3.10.1. VID – Vendor Identification .............................................................................. 94
3.10.2. DID – Device Identification............................................................................... 95
3.10.3. PCICMD – PCI Command Register................................................................. 96
3.10.4. PCISTS – PCI Status Register ........................................................................ 97
3.10.5. RID – Revision Identification............................................................................ 98
3.10.6. SUBC – Sub-Class Code ................................................................................. 98
3.10.7. BCC – Base Class Code.................................................................................. 98
3.10.8. HDR – Header Type......................................................................................... 99
3.10.9. SVID – Subsystem Vendor Identification ......................................................... 99
3.10.10.ID – Subsystem Identification .......................................................................... 99
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Intel^® 852GM/852GMV Chipset GMCH Datasheet