JG82852GMSL7VP Datasheet, PDF (23/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Introduction
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1.4.
1.4.1.
Processor Host Interface
Intel 852GM GMCH Processor Host Interface
Mobile Intel Pentium 4 Processor-M key features include:
Source synchronous double pumped address (2X)
Source synchronous quad pumped data (4X)
System bus interrupt and side-band signal delivery
In this mode, Intel 852GM GMCH supports:
A 64B cache line size
A Front Side Bus frequency of 400-MHz (dual processor is not supported)
AGTL+ termination resistors on all of the AGTL+ signals
32-bit host bus addressing allowing the CPU to access the entire 4 GB of the Intel 852GM GMCH
memory address space
Mobile Intel Celeron processor key features include:
Support for a 400-MHz Front Side Bus frequency
Source synchronous double pumped address (2X)
Source synchronous quad pumped data (4X)
System bus interrupt and side-band signal delivery
AGTL+ termination resistors on all of the AGTL+ signals
32-bit host bus addressing allowing the CPU to access the entire 4-GB of the memory address
space
Intel Celeron M processor key features include:
Support for a 400-MHz Front Side Bus frequency
Source synchronous double pumped address (2X)
Source synchronous quad pumped data (4X)
Front side bus interrupt delivery
Low voltage swing Vtt (1.05V)
Dynamic Power Down (DPWR#) support
Integrates AGTL+ termination resistors on all of the AGTL+ signals
Supports 32-bit host bus addressing allowing the CPU to access the entire 4 GB of the GMCH
memory address space
An 8-deep, In-Order queue
Support DPWR# signal
Supports one outstanding defer cycle at a time to any particular I/O interface
Intel 852GM GMCH has an In-Order Queue to support outstanding pipelined address requests on the
host bus. Intel 852GM GMCH supports one outstanding defer cycle at a time; however, it supports only
one to any particular I/O interface. Host initiated I/O cycles are positively decoded to the Intel 852GM
GMCH configuration space and subtractively decoded to the Hub Interface. Host initiated memory
Intel^® 852GM/852GMV Chipset GMCH Datasheet
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