JG82852GMSL7VP Datasheet, PDF (13/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

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16 and 24-bit W Buffering
specification
8-bit Stencil Buffering
Integrated PWM interface for LCD
Double and Triple Render Buffer
backlight inverter control
support
16 and 32-bit color
Bi-linear Panel fitting
ƒ ^Package
Destination Alpha
Vertex Cache
732-pin Micro-FCBGA (37.5 x 37.5 mm)
ƒ ^{Power Management}
Maximum 3D resolution of
SMRAM space remapping to A0000h (128
backlight inverter control
kB)
Bi-linear Panel fitting
Supports extended SMRAM space above
1600x1200 at 85-Hz (contact your
256-MB, additional 1-MB TSEG from Top
Intel Field Representative for
of Memory, cacheable (cacheability
detailed display information, i.e.
controlled by CPU)
pixel depths, etc.)
APM Rev 1.2 compliant power
Optimal 3D resolution supported
management
Fast Clear support
Supports Suspend to System Memory (S3),
ROP support
ƒ ^{Hub Interface to ICH4-M}
266 MB/s point-to-point Hub Interface to
ICH4-M
66-MHz base clock
Suspend to Disk (S4) and Hard Off/Total
Reboot (S5)
ACPI 1.0b, 2.0 Support
Single or dual channel LVDS panel
support up to SXGA+(1400x1050 60-Hz)
panel resolution with frequency range from
25-MHz to 112-MHz (single channel/dual
channel)
SSC support of 0.5%, 1.0%, and 2.5%
center and down spread with external SSC
clock
Supports data format of 18-bpp
LCD panel power sequencing compliant
with SPWG timing specification
Intel^® 852GM/852GMV Chipset GMCH Datasheet
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