JG82852GMSL7VP Datasheet, PDF (50/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Register Description
R
Bit
31
30:24
23:16
15:11
10:8
7:2
1:0
Descriptions
Configuration Enable (CFGE): When this bit is set to 1, accesses to PCI configuration space are
enabled. If this bit is reset to 0, accesses to PCI configuration space are disabled.
Reserved
Bus Number: When the Bus Number is programmed to 00h the target of the Configuration Cycle is a
Hub Interface agent (GMCH, ICH4-M, etc.).
The Configuration Cycle is forwarded to Hub Interface if the Bus Number is programmed to 00h and the
GMCH is not the target (the device number is >= 2).
Device Number: This field selects one agent on the PCI bus selected by the Bus Number. When the Bus
Number field is “00” the GMCH decodes the Device Number field. The GMCH is always Device Number 0
for the Host-Hub Interface bridge entity. Therefore, when the Bus Number =0 and the Device Number=0-1
the internal GMCH devices are selected.
For Bus Numbers resulting in Hub Interface configuration cycles, the GMCH propagates the device
number field as A[15:11].
Function Number: This field is mapped to A[10:8] during Hub Interface configuration cycles. This allows
the configuration registers of a particular function in a multi-function device to be accessed. The GMCH
ignores configuration cycles to its internal Devices if the function number is not equal to 0.
Register Number: This field selects one register within a particular Bus, Device, and Function as
specified by the other fields in the Configuration Address Register. This field is mapped to A[7:2] during
Hub Interface Configuration cycles.
Reserved
50
Intel^® 852GM/852GMV Chipset GMCH Datasheet