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JG82852GMSL7VP Datasheet, PDF (133/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)
Functional Description
R
5.4.3.7.
5.4.3.8.
5.4.3.9.
Color Buffer Formats: (Destination Alpha)
The Raster Engine supports 8-bit, 16-bit, and 32-bit Color Buffer Formats. The 8-bit format is used to
support planar YUV420 format, which is used only in Motion Compensation and Arithmetic Stretch
format. The bit format of Color and Z is allowed to mix.
The GMCH can support an 8-bit destination alpha in 32-bit mode. Destination alpha is supported in 16-
bit mode in 1555 or 4444 format. The Intel 852GM/852GMV GMCH does not support general 3D
rendering to 8-bit surfaces. 8-bit destinations are supported for operations on planar YUV surfaces (e.g.,
stretch Blts) where each 8-bit color component is written in a separate pass. The GMCH also supports a
mode where both U and V planar surfaces can be operated on simultaneously.
The frame buffer of the GMCH contains at least two hardware buffers - the Front Buffer (display buffer)
and the Back Buffer (rendering buffer). While the back buffer may actually coincide with (or be part of)
the visible display surface, a separate (screen or window-sized) back buffer is typically used to permit
double-buffered drawing. That is, the image being drawn is not visible until the scene is complete and
the back buffer made visible or copied to the front buffer via a 2D BLT operation. Rendering to one
buffer and displaying from the other buffer removes image tearing artifacts. Additionally, more than
two back buffers (e.g., triple-buffering) can be supported.
Depth Buffer
The Raster Engine is able to read and write from this buffer and use the data in per fragment operations
that determine resultant color and depth value of the pixel for the fragment are to be updated or not.
Typical applications for entertainment or visual simulations with exterior scenes require far/near ratios
of 1000 to 10000. At 1000, 98% of the range is spent on the first 2% of the depth. This can cause hidden
surface artifacts in distant objects, especially when using 16-bit depth buffers. A 24-bit Z-buffer provides
16 million Z-values as opposed to only 64 k with a 16-bit Z-buffer. With lower Z-resolution, two distant
overlapping objects may be assigned the same Z-value. As a result, the rendering hardware may have a
problem resolving the order of the objects, and the object in the back may appear through the object in
the front.
By contrast, when w (or eye-relative z) is used, the buffer bits can be more evenly allocated between the
near and far clip planes in world space. The key benefit is that the ratio of far and near is no longer an
issue, and allows applications to support a maximum range of miles, yet still get reasonably accurate
depth buffering within inches of the eye point. The selection of depth buffer size is relatively
independent of the color buffer. A 16-bit Z/W or 24-bit Z/W buffer can be selected with a 16-bit color
buffer. Z buffer is not supported in 8-bit mode.
Stencil Buffer
The Raster Engine provides 8-bit stencil buffer storage in 32-bit mode and the ability to perform stencil
testing. Stencil testing controls 3D drawing on a per pixel basis and conditionally eliminates a pixel on
the outcome of a comparison between a stencil reference value and the value in the stencil buffer at the
location of the source pixel being processed. They are typically used in multipass algorithms to achieve
special effects, such as decals, outlining, shadows, and constructive solid geometry rendering.
One of three possible stencil operations is performed when stencil testing is enabled. The stencil
operation specifies how the stencil buffer is modified when a fragment passes or fails the stencil test.
The selection of the stencil operation to be performed is based upon the result of the stencil test and the
depth test. A stencil write mask is also included that controls the writing of particular bits into the stencil
buffer. It selects between the destination value and the updated value on a per-bit basis. The mask is 8-
bit wide.
Intel® 852GM/852GMV Chipset GMCH Datasheet
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