JG82852GMSL7VP Datasheet, PDF (25/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Introduction
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1.7.
1.7.1.
1.7.2.
Technology
256 Mb
512 Mb
Width
16
16
System Memory Capacity
512 MB
1 GB
The Intel 852GM/852GMV GMCH System Memory interface supports a thermal throttling scheme to
selectively throttle reads and/or writes. Throttling can be triggered either by on-die thermal sensor, or by
preset write bandwidth limits. Read throttle can also be triggered by an external input pin. The memory
controller logic supports aggressive dynamic row power down features (SCKE) to help reduce power
and supports Address and Control lines Tri-stating when DDR SDRAM is in active power down or self
refresh.
The Intel 852GM/852GMV GMCH System Memory architecture is optimized to maintain open pages
(up to 16-kB page size) across multiple rows. As a result, up to 16 pages across four rows. To
complement this, the GMCH will tend to keep pages open within rows, or will only close a single bank
on a page miss. Intel 852GM/852GMV GMCH supports only two bank memory technologies.
Intel 852GM/852GMV GMCH Internal Graphics
The GMCH IGD provides a highly integrated graphics accelerator delivering high performance 3D, 2D,
and video capabilities. With its interfaces to UMA using a DVMT configuration, analog display, LVDS,
and digital display (e.g. flat panel), the GMCH provides a complete graphics solution. The GMCH
contains an extensive set of instructions for the following:
The GMCH also provides 2D hardware acceleration for block transfers of data (BLTs). The BLT engine
provides the ability to copy a source block of data to a destination and perform raster operations (e.g.,
ROP1, ROP2, and ROP3) on the data using a pattern, and/or another destination. Performing these
common tasks in hardware reduces CPU load, and thus improves performance.
High bandwidth access to data is provided through the System Memory ports. The GMCH uses Tiling
architecture to increase System Memory efficiency and thus maximize effective rendering bandwidth.
The Intel 852GM/852GMV GMCH has three display ports, one analog and two digital. These provide
support for a progressive scan analog monitor, a dedicated dual channel LVDS panel and a DVO device.
Each port can transmit data according to one or more protocols. The DVO port is connected to an
external device that converts one protocol to another. Examples of this are TV-out encoders, external
DACs, LVDS transmitters, and TMDS transmitters. Each display port has control signals that may be
used to control, configure and/or determine the capabilities of an external device. The data that is sent
out the display port is selected from one of the two possible sources, pipe A or pipe B.
Intel 852GM/852GMV GMCH Analog Display Port
Intel 852GM/852GMV GMCH has an integrated 350-MHz, 24-bit RAMDAC that can directly drive a
progressive scan analog monitor pixel resolution up to 1600x1200 at 85-Hz refresh and up to 1920x1440
at 60-Hz refresh. The DAC port can be driven on Pipe A or Pipe B.
Intel 852GM/852GMV GMCH Integrated LVDS Port
The Intel 852GM/852GMV GMCH has an integrated dual channel LFP Transmitter interface to support
LVDS LCD panel resolutions up to SXGA+ with center and down spread SSC support of 0.5%, 1%, and
2.5% utilizing an external SSC clock. The display pipe provides panel up-scaling to fit a source image
Intel^® 852GM/852GMV Chipset GMCH Datasheet
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