JG82852GMSL7VP Datasheet, PDF (76/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Register Description
R
3.9. Intel 852GM/852GMV GMCH Main Memory Control,
Memory I/O Control Registers (Device #0, Function #1)
The following table shows the Intel 852GM/852GMV GMCH configuration space for Device #0,
Function #1. See Section 3.2 for access nomenclature.
Table 19. Host-Hub I/F Bridge/System Memory Controller Configuration Space (Device #0,
Function#1)
Register Name
Register
Symbol
Register
Start
Register
End
Default Value
Access
Vendor Identification
VID
00
Device Identification
DID
02
PCI Command Register
PCICMD
04
PCI Status Register
PCISTS
06
Revision Identification
RID
08
Sub-Class Code
SUBC
0A
Base Class Code
BCC
0B
Header Type
HDR
0E
Subsystem Vendor Identification
SVID
2C
Subsystem Identification
SID
2E
Capabilities Pointer
CAPPTR
34
DRAM Row 0-3 Boundaries
DRB 0-3
40
DRAM Row 0-3 Attributes
DRA 0-3
50
DRAM Timing Register
DRT
60
DRAM Controller Power
PWRMG
68
Management Control Register
Dram Controller Mode
DRC
70
DRAM Throttle Control
DTC
A0
01
8086h
RO
03
3584h
RO
05
0006h
RO R/W
07
0080h
RO R/WC
08
01h
RO
0A
80h
RO
0B
08h
RO
0E
00h
RO
2D
0000h
R/WO
2F
0000h
R/WO
34
00h
RO
43
00000000h
RW
51
7777h
RW
63
18004425h
RW
6B
00000000h
R/W
73
00000081h
R/W
A3
00000000h
R/W/L
76
Intel^® 852GM/852GMV Chipset GMCH Datasheet