JG82852GMSL7VP Datasheet, PDF (63/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Register Description
R
3.8.15.
GGC – GMCH Graphics Control Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
52–53h
0030h
Read/Write, Read Only
16 bits
Bit
15:7
6:4
3:2
1
0
Descriptions
Reserved
Graphics Mode Select (GMS): This field is used to select the amount of Main System Memory that is pre-
allocated to support the Internal Graphics Device in VGA (non-linear) and Native (linear) modes. The BIOS
ensures that System Memory is pre-allocated only when Internal Graphics is enabled.
000 = No System Memory pre-allocated. Device #2 (IGD) does not claim VGA cycles (Mem and IO), and the
Sub-Class Code field within Device #2 Function #0 Class Code register is 80.
001 = DVMT (UMA) mode, 1 MB of System Memory pre-allocated for frame buffer.
010 = DVMT (UMA) mode, 4 MB of System Memory pre-allocated for frame buffer.
011 = DVMT (UMA) mode, 8 MB of System Memory pre-allocated for frame buffer.
100 = DVMT (UMA) mode, 16 MB of System Memory pre-allocated for frame buffer.
101 = DVMT (UMA) mode, 32 MB of System Memory pre-allocated for frame buffer.
All other combinations reserved.
Reserved
IGD VGA Disable (IVD):
1 = Disable. Device #2 (IGD) does not claim VGA cycles (Mem and IO), and the Sub-Class Code field within
Device #2 Function #0 Class Code register is 80.
0 = Enable (Default). Device #2 (IGD) claims VGA memory and IO cycles, the Sub-Class Code within Device
#2 Class Code register is 00.
Reserved
Intel^® 852GM/852GMV Chipset GMCH Datasheet
63