JG82852GMSL7VP Datasheet, PDF (68/176 Pages) Intel Corporation – Intel® 852GM/852GMV Chipset Intel® 852GM/852GMV Chipset Hub (GMCH)

Register Description
R
DOS Application Area (00000h–9FFFh)
The DOS area is 640 kB in size and it is further divided into two parts. The 512-kB area at 0 to 7FFFFh
is always mapped to the main System Memory controlled by the Intel 852GM/852GMV GMCH, while
the 128-kB address range from 080000 to 09FFFFh can be mapped to PCI0 or to main DDR SDRAM.
By default this range is mapped to main System Memory and can be declared as a main System Memory
hole (accesses forwarded to PCI0) via Intel 852GM/852GMV GMCH’s FDHC configuration register.
Video Buffer Area (A0000h–BFFFFh)
Attribute bits do not control this 128-kB area. The host -initiated cycles in this region are always
forwarded to either PCI0 or PCI2 unless this range is accessed in SMM mode. Routing of accesses is
controlled by the Legacy VGA control mechanism of the “virtual” PCI-PCI bridge device embedded
within the Intel 852GM/852GMV GMCH.
This area can be programmed as SMM area via the SMRAM register. When used as an SMM space, this
range can not be accessed from Hub Interface.
Expansion Area (C0000h–DFFFFh)
This 128-kB area is divided into eight 16-kB segments that can be assigned with different attributes via
PAM control register as defined in table 17 and table 18.
Extended System BIOS Area (E0000h–EFFFFh)
This 64-kB area is divided into four 16-kB segments that can be assigned with different attributes via
PAM control register as defined in table 17 and table 18.
System BIOS Area (F0000h–FFFFFh)
This area is a single 64-kB segment that can be assigned with different attributes via PAM control
register as defined in table 17 and table 18.
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Intel^® 852GM/852GMV Chipset GMCH Datasheet