English
Language : 

DS537 Datasheet, PDF (98/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC
LogiCORE IP XPS LL TEMAC (v2.03a)
Table 64 shows the second Hard TEMAC Internal 1000BASE-X PCS/PMA Management PHY Identifier Register bit
definitions.
Table 64: 1000BASE-X Management PHY Identifier (Register 3) Bit Definitions
Bit(s) Name
Core
Access
Reset Value
Description
10 - 15
OUI
Read
returns OUI (19-24) Organizationally Unique Identifier (OUI) from IEEE is 0x000A35.
0x0035
30
MMN
Returns 0
0
Manufacturer’s Model Number. Always returns 0s.
29
Revision Returns 0
0
Revision Number. Always returns 0s.
Table 65 shows the Hard TEMAC Internal 1000BASE-X PCS/PMA Management Auto Negotiation Advertisement
Register bit definitions.
Table 65: 1000BASE-X Management Auto Negotiation Advertisement Register (Register 4) Bit Definitions
Bit(s)
Name
Core Access
Reset
Value
Description
15
Next Page
Read/Write
0 - next page functionality is not advertised
0
1 - next page functionality is advertised
14
Reserved
Returns 0s
0 Always return zeros.
00 - no error
Read/Write self
12 - 13 Remote Fault clearing after
auto negotiation
0x0
01 - offline
10 - link failure
11 - auto negotiation error
9 - 11 Reserved
Returns 0s
0x0 Always return zeros.
7-8
Pause
Read/write
00 - no pause
0x3
01 - asymmetric pause towards link partner
10 - symmetric pause
11 - both symmetric pause and asymmetric pause towards link partner
6
Half Duplex
Returns 0
0 Always return zeros because half duplex is not supported.
5
Full Duplex
Read/Write
0 - full duplex mode is not advertised
1
1 - full duplex mode is advertised
0 - 4 Reserved
Returns 0s
0x0 Always return zeros.
www.xilinx.com
98