DS537 Datasheet, PDF (74/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC

LogiCORE IP XPS LL TEMAC (v2.03a)
Table 53: Receive LocalLink Footer Word 4 (APP1)
Bit(s)
Name
Description
0 - 31
MCAST_ADR_L
Multicast Address (31:0). These are the lower 32bits of the multicast destination address of
this frame. This value is only valid if Footer word 5 bit 31 is a 1. The address is ordered so the
first byte received is the lowest positioned byte in the register; for example, MAC address of
AA-BB-CC-DD-EE-FF would be stored in UnicastAddr(47:0) as 0xFFEEDDCCBBAA. This word
would be 0xDDCCBBAA.
Table 54: Receive LocalLink Footer Word 5 (APP2)
Bit(s)
Name
Description
(Msb)
0 - 28
Reserved
Undefined value.
29
BCAST_FLAG
Broadcast Frame Flag. This bit, when 1, indicates that the current frame is a Broadcast frame
that has passed the hardware address filtering.
IP Multicast Frame Flag. This bit, when 1, indicates that the current frame is a multicast frame
30 IP_MCAST_FLAG that appears to be formed from an IP multicast frame (the first part of the destination address is
01:00:5E) that has passed the hardware multicast address filtering.
31 MAC_MCAST_FL MAC Multicast Frame Flag. This bit, when 1, indicates that the current frame is a MAC multicast
(Lsb)
AG
frame that has passed the hardware multicast address filtering.
Table 55: Receive LocalLink Footer Word 6 (APP3)
Bit(s)
Name
Description
(Msb)
0 - 15
T_L_TPID
Type Length VLAN TPID. This is the value of the 13th and 14th bytes of the frame. If the frame
is not VLAN type, this will be the type/length field. If the frame is VLAN type, this will be the value
of the VLAN TPID field prior to any stripping, translation or tagging.
16 - 31
(Lsb)
RX_CSRAW
Receive Raw Checksum. This value is the raw receive checksum calculated over the entire
Ethernet frame starting at byte 14. If the receive FCS stripping is not enabled, the FCS will be
included in the checksum and must be removed by the application.
Table 56: Receive LocalLink Footer Word 7 (APP4)
Bit(s)
Name
Description
(Msb)
0 - 15
VLAN_TAG
VLAN Priority CFI and VID. This is the value of the 15th and 16th bytes of the frame. If the
frame is VLAN type, this will be the value of the VLAN priority, CFI, and VID fields prior to any
stripping, translation, or tagging. If the frame is not VLAN type, this will be the first 2 bytes of the
data field.
16 - 17
Reserved
Undefined value.
18- 31
(Lsb)
RX_BYTECNT
Receive Frame Length (Bytes). This value is the number of bytes in the Ethernet frame which
is in the receive LocalLink payload field.
Mapping Xilinx DMA Buffer Descriptor Fields to LocalLink Fields
The XPS_LL_TEMAC requires that certain LocalLink header and footer fields be used to support TCP / IP
Checksum Off load. The XPS_LL_TEMAC does not have any requirements on how the LocalLink fields are created
or where the data comes from, only that the correct values are in each field.
At the time that this document is written, Xilinx provides two cores that may be used to provide the required
LocalLink functionality to implement TCP / IP Checksum Off load: the SDMA_v2_00_B which is part of the
MPMC_V5_04_A and the Hard DMA included in the PowerPC 440 Processor block. Please refer to the their
respective documents list in Reference Documents, page 146 for more information.
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