DS537 Datasheet, PDF (130/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC

LogiCORE IP XPS LL TEMAC (v2.03a)
Table 118: 1000BASE-X Management Auto negotiation Link Partner Ability Base Register (Register 5) Bit
Definitions (Cont’d)
Bit(s)
Name
Core
Access
Reset
Value
Description
5
Full Duplex
Read/
0 - full duplex mode is not supported
0
1 - full duplex mode is supported
0 - 4 Reserved Returns 0s 0x0 Always return zeros.
Table 119 shows the Hard TEMAC Internal 1000BASE-X PCS/PMA Management Auto negotiation Expansion
Register bit definitions.
Table 119: 1000BASE-X Management Auto Negotiation Expansion Register (Register 6) Bit Definitions
Bit(s)
Name
Core Access
Reset
Value
Description
3 - 15 Reserved
Returns 0s
0x0 Always return zeros.
2
Next Page
Able
Returns 1
1
Always returns a 1 for this bit because the device is Next Page Able.
1
Page
Read self clearing
Received
on read
0
0 - a new page is not received
1 - a new page is received
0
Reserved
Returns 0s
0 Always return zeros.
Table 120 shows the Hard TEMAC Internal 1000BASE-X PCS/PMA Management Auto Negotiation Next Page
Transmit Register bit definitions.
Table 120: 1000BASE-X Management Auto Negotiation Next Page Transmit Register (Register 7) Bit
Definitions
Bit(s)
Name
Core
Access
Reset Value
Description
15
Next Page
Read/Write
0
0 - last page
1 - additional next page(s) will follow
14
Reserved
Returns 0s
0
Always return zeros.
13
Message Page
Read/Write
1
0 - unformatted page
1 - message page
12
Acknowledge 2
Read/Write
0
0 - cannot comply with message
1 - complies with message
11
Toggle
Read
0
Value toggles between sequent pages.
0 -10
Message or unformatted
Code Field
Read/Write
0x001 (null Message code field or unformatted page encoding as
message dictated by bit 13.
code)
www.xilinx.com
130