DS537 Datasheet, PDF (70/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC

LogiCORE IP XPS LL TEMAC (v2.03a)
provide functions to calculate this value as it is normally variable based on the variable IP datagram header size. In
all cases, the TX_CSBEGIN value must be 14 or larger to be valid.
TX_CSINSERT is the offset which points to the location where the checksum value should be written into the TCP
or UDP segment header. This value must be 16 bit aligned and can not be in the first 8 bytes of the frame. Again,
operating systems may provide functions to calculate this value as it is normally variable based on the variable IP
datagram header size.
TX_CSCNTRL is a 16 bit field however only the least significant bit is defined. This bit will control the insertion of
the checksum into the frame data. If set to a "1" then the checksum will be written into the transmit frame otherwise
not modification of the frame will occur.
TX_CSINIT is a 16-bit seed that can be used to insert the TCP or UDP pseudo header into the checksum calculation.
In many cases the protocol stack will calculate the pseudo header checksum value and place it in the header
checksum field of the transmit frame. In those cases this field should be zeroed. If the protocol stack does not
provide the pseudo header checksum in the header checksum field location of the transmit frame, then that field
should be zeroed and the pseudo header checksum value must be calculated and placed in the TX_CSINIT field of
the buffer descriptor.
In order for the transmit checksum to be calculated correctly, the transmit Ethernet FCS must not be provided as
part of the transmit data and the transmit FCS calculation and insertion must be enabled in the XPS_LL_TEMAC.
There is a special case for checksums of UDP datagrams. From the UDP RFC 768:
If the computed checksum is zero, it is transmitted as all ones (the equivalent in one’s complement arithmetic).
An all zero transmitted checksum value means that the transmitter generated no checksum (for debugging or for
higher level protocols that don’t care).
If the frame encapsulates a UDP datagram, and if the resulting checksum is zero, then a value of all ones is used.
This case does not exist for TCP because a checksum of zero is legal.
RX_CSRAW is the raw receive checksum calculated over the entire Ethernet payload. It is calculated starting at byte
14 of the Ethernet frame (the byte following the Type/Length field) and continues until the end of the Ethernet
frame. If the receive Ethernet FCS stripping is not enabled in the XPS_LL_TEMAC, the FCS will also be included in
the checksum. The application is required to calculate the checksum of the fields which should not have been
included to subtract them from the RAW checksum value. In most cases, the protocol software which allows receive
checksum off loading will require a pass or fail indication. The application will have to compare the adjusted raw
checksum value with the checksum field of the TCP or UDP header and provide the pass or fail indication.
LocalLink Transmit and Receive Data Interfaces
The Ethernet frame data to be transmitted and the frame data that is received passes between the XPS_LL_TEMAC
and the rest of the embedded system via Xilinx LocalLink interfaces. In many cases the other end of the LocalLink
interfaces will be connected to a DMA controller that in some devices is Hard IP located in silicon and in other
devices is soft IP implemented in FPGA fabric.
However, any custom logic may be used to connect to the LocalLink interface as long as it meets the requirements
of the XPS_LL_TEMAC LocalLink interface.
The LocalLink interface is a high-performance, synchronous, point-to-point connection which, in its general use
case, is described in its specification listed in the Referenced Documents (page 146).
This section will describe the specific 32-bit implementation used by the XPS_LL_TEMAC core to transfer transmit
and receive Ethernet frame data with the rest of the embedded system.
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