English
Language : 

DS537 Datasheet, PDF (37/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC
LogiCORE IP XPS LL TEMAC (v2.03a)
Table 18 shows the Unicast Address Word Upper Registers bit definitions.
Table 18: Unicast Address Word Upper Registers Bit Definitions
Bit(s)
Name
Core
Access
Reset Value
Description
16 - 31 Reserved
Read
0x0
Reserved. These bits are reserved for future definition and will
always return zero.
0 - 15 UnicastAddr Read/Write
0x00000000
Unicast Address (47:32). This address is used to match against the
destination address of any received frames.
The address is ordered so the first byte transmitted/received is the
lowest positioned byte in the register; for example, a MAC address
of AA-BB-CC-DD-EE-FF would be stored in UnicastAddr(47:0) as
0xFFEEDDCCBBAA.
VLAN TPID Word 0 Register (TPID00 and TPID10)
The VLAN TPID Word 0 Register is shown in Figure 16. This register is only used when transmit and/or receive
VLAN functions are included in the core at build-time (C_TEMACx_TXVLAN_TAG = 1 and/or
C_TEMACx_RXVLAN_TAG = 1 and/or C_TEMACx_TXVLAN_STRP= 1 and/or C_TEMACx_RXVLAN_STRP= 1
and/or C_TEMACx_TXVLAN_TRAN = 1 and/or C_TEMACx_RXVLAN_TRAN = 1).
This register and the following register allow 4 TPID values be specified for recognizing VLAN frames for both the
transmit and receive paths. The most common values for VLAN TPID are 0x8100, 0x9100, 0x9200, 0x88A8. Please
see the section on VLAN functions (Extended VLAN Support, page 85) for more information about extended
VLAN functions.
X-Ref Target - Figure 16
0
TPID value 1
15 16
TPID value 0
31
DS537_16_091909
Figure 16: VLAN TPID Word 0 Register (offset 0x038 and 0x078)
Table 19 shows the VLAN TPID Word 0 Registers bit definitions.
Table 19: VLAN TPID Word 0 Registers Bit Definitions
Bit(s)
Name
Core
Access
Reset Value
Description
16 - 31 TPID value 0 Read/Write
0x0
TPID Value 0. These bits represent one TPID value that will be used
for recognizing VLAN frames for both the transmit and receive paths.
0 - 15 TPID value1 Read/Write
0x0
TPID Value 1. These bits represent one TPID value that will be used
for recognizing VLAN frames for both the transmit and receive paths.
VLAN TPID Word 1 Register (TPID01 and TPID11)
The VLAN TPID Word 1 Register is shown in Figure 17. This register is only used when transmit and/or receive
VLAN functions are included in the core at build-time (C_TEMACx_TXVLAN_TAG = 1 and/or
C_TEMACx_RXVLAN_TAG = 1 and/or C_TEMACx_TXVLAN_STRP= 1 and/or C_TEMACx_RXVLAN_STRP= 1
and/or C_TEMACx_TXVLAN_TRAN = 1 and/or C_TEMACx_RXVLAN_TRAN = 1).
This register and the previous register allow 4 TPID values be specified for recognizing VLAN frames for both the
transmit and receive paths. The most common values for VLAN TPID are 0x8100, 0x9100, 0x9200, 0x88A8. Please
www.xilinx.com
37