DS537 Datasheet, PDF (79/148 Pages) Xilinx, Inc – LogiCORE IP XPS LL TEMAC

LogiCORE IP XPS LL TEMAC (v2.03a)
Address Filtering
Basic Mode
The receive address filtering function accepts or rejects received frames by examining the destination address field.
Part of this function is carried out in the Hard TEMAC silicon component and part is carried out based on the bit
settings in the Control Register (page 25). Figure 50 shows the address filtering flow. The decisions shown in white
are made in the Hard TEMAC silicon component while the decisions shown in grey are made based on the Control
Register settings.
The filtering functions includes:
Hard TEMAC Silicon component functions:
• Programmable unicast destination address matching
• Four programmable multicast address matching
• Broadcast address recognition (0xFFFF FFFF FFFF)
• Optional pass through mode with address filter disabled (promiscuous mode)
• Pause control frame address recognition (0x0100 00C2 8001)
Control Register enabled functions:
• Enable or reject received multicast frames
• Enable or reject received broadcast frames
Receive address filtering eliminates the software overhead required to process frames that aren’t relevant to a
particular Ethernet interface by checking the Destination Address (DA) field of the received frame.
The unicast address and multicast addresses are programmed in software via the PLB bus as are the Address Filter
enable bit, Multicast Address enable bit, and Broadcast Address enable bit. The pause frame address and broadcast
address are predefined and do not need programming.
Please refer the footnote in Table 12, “Interrupt Status Register Bit Definitions,” on page 30 for a more detailed
description on the conditions that can cause the receive reject interrupt to be set.
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